Sri Shakthi Institute of Engineering & Technology
Sri Shakthi Institute of Engineering & Technology
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Name of Teaching Staff Dr. V. Rajmohan

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Designation Associate Professor
Department Electronics and Communication Engineering
Date of Joining the Institution 08 May 2017
Qualification with Class / Grade UG PG PhD
B.E / First Class M.E./ First Class Completed
Total Experience in Years Teaching : 14 year(s) Industry : 0 year(s) Research : 0 Year(s)
Publications National International Book
Journals: Conferences: 4 Journals: 6 Conferences: 7  
Thesis / Projects Guided UG Level: PG Level: PhD :
Professional Memberships Life Member - ISTE
Consultancy Activities  
Awards / Patents obtained  
Institutional Collaboration  
Grants Obtained Number of Grants:

 

List of publications
INTERNATIONAL JOURNALS
•V. Rajmohan, Dr. O. Uma Maheswari, ‘Improved Baugh-Wooley Multiplier using Cadence Register Transfer Level Logic for Power Consumption’, Journal of Computational and Theoretical Nano science (CTN, ISSN Print: 1546-1955,  ISSN Online: 1546-1963 ), Vol. 14, no. 1, pp. 277-283, 2017 (IF – 1.666). doi: 10.1166/jctn.2016.6317.
•Rajmohan, V. and Uma Maheswari, O., 2016, ‘Design of Compact Baugh-Wooley Multiplier Using Reversible Logic’, Circuits and Systems, (CS, ISSN Print: 2153-1285, ISSN Online: 2153-1293), Vol. 7, pp. 1522-1529. doi: 10.4236/cs.2016.78133.
•V. Rajmohan, Dr. O. Uma Maheswari, ‘Low Power Modified Wallace Tree Multiplier using Cadence Tool’, Journal of Electrical Engineering, (JEE, ISSN Print: 1582-4594) June 2016 (Accepted for Publication)(IF – 2.5682).
•“Scalable Modular Design of finite field Multipliers Using Systolic Architectures” published in International Journal of VLSI Design, Vol (2), Issue 1, January – June 2011 pp: 13 – 18. (ISSN: 2229-3167)
•“A Novel Reversible Design of Unified Single Digit BCD Adder-Subtractor” published in International Journal of Computer Theory and Engineering, Vol (3), Issue 5, Oct 2011 pp: 702 – 705.
•“A REVERSIBLE DESIGN OF BCD MULTIPLIER” published in Journal of Computing, Vol (2), Issue 11, Nov 2010 pp.112-117.( ISSN 2151-9617 & Impact Factor – 0.45)
INTERNATIONAL CONFERENCES
•Presented a paper on “Optimized Shift Register Design Using Reversible Logic” at International Conference on Electronics Computer Technology (ICECT-2011) at Kanyakumari, India during 8-10, April 2011. (Proceedings has been included in IEEE Explore)
•Presented a paper on “Design of Counters Using Reversible Logic” at International Conference on Networks and Computer Science (ICNCS-2011) at Kanyakumari, India during 8-10, April 2011. (Proceedings has been included in IEEE Explore)
•Presented a paper on “FPGA Implementation of Viterbi Algorithm for Processing of Forward Error Control in Software Radio Receiver” at International Conference on Communication and Signal Processing (ICCOS-2011) at Karunya University, Coimbatore during 17-18, March 2011.
•Presented a paper on “Scalable Modular Design of Finite Field Multipliers Using Systolic Architecture” at International Conference on Communication and Signal Processing (ICCOS-2011) at Karunya University, Coimbatore during 17-18, March 2011.  
•Presented a paper on “Optimization of Reversible BCD Adder in terms of Number of Lines” at International Conference on Information Communication & Embedded System (ICICES-2011) at SA Engineering College, Chennai during 23-24, February 2011.
•Presented a paper on “ Low Power Implementation of Survivor Path Processing in ML Decoding Algorithm Using RE, TB and TF Methods in FPGA” at the International Conference on Smart Technologies for Materials, Communication, Controls, Computing and Energy (ICST-2011) at Vel-Tech High-Tech University, Chennai during 5-7, January 2011. (ISBN 978-1-4507-5567-2).
•Presented a paper on “A Low Power Architecture of Viterbi Decoder for Processing of Forward Error Control in Software Radio Receiver”  at the International Conference on Smart Technologies for Materials, Communication, Controls, Computing and Energy (ICST-2011) at Vel-Tech High-Tech University, Chennai during 5-7, January 2011.
NATIONAL CONFERENCES
•Presented a paper on “Designing of High Speed Multiplier” at the National Conference on Microwave and Optical Communcation (NCMOC’11) at Alagappa Chettiar College of Engineering and Technology, Karaikudi, Tamilnadu on March 30, 2011.
•Presented a paper on “Development of Variable Length FFT Processor” at the 2nd National Conference on Recent Advances in Electronics & Communicatin Technologies (RAECT’11) at Guru Nanak Dev Engineering College, Ludhiana during March 04-05, 2011.
•Presented a paper on “ Dynamically Reconfigurable Solution in the digital Baseband processing for Future Radio Devices” at the National Conference on Innovative Technologies in Electrical and Electronics Systems (ITEES’10) at Muthayammal Engineering College, Rasipuram on Feb, 24-25 ’10.
•Presented a paper on “An analysis on Digital Image Steganography method against histrogram” at the National Conference on Communication, Computation, Control and Automation (CCCA-SRIT ‘10) at Sri Ramakrishna Institute of Technology, Coimbatore on April 23 – 24 ’10.


 
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Admission 2017